Hardware and software may often be used to support asynchronous data transfers between two memory regions in data network connections, often on different systems. Each host system may serve as a source (initiator) system which initiates a message data transfer (message send operation) to a target system of a message passing operation (message receive operation). Examples of such a system may include host servers providing a variety of applications or services and I/O units providing storage oriented and network oriented I/O services. Requests for work, for example, data movement operations including message send/receive operations and remote direct memory access (RDMA) read/write operations may be posted to work queues associated with a given hardware adapter, the requested operation may then be performed. It may be the responsibility of the system which initiates such a request to check for its completion. In order to optimize use of limited system resources, completion queues may be provided to coalesce completion status from multiple work queues belonging to a single hardware adapter. After a request for work has been performed by system hardware, notification of a completion event may be placed on the completion queue. Completion queues may provide a single location for system hardware to check for multiple work queue completions.
Completion queues may support one or more modes of operation. In one mode of operation, when an item is placed on the completion queue, an event may be triggered to notify the requester of the completion. This may often be referred to as an interrupt-driven model. In another mode of operation, an item may be placed on the completion queue, and no event may be signaled. It may be then the responsibility of the request system to periodically check the completion queue for completed requests. This may be referred to as polling for completions.
A status block may comprise a driver that may be enabled to determine whether a particular completion queue has been updated. A plurality of status blocks may be coalesced based on one or more modes per protocol in each status block segment. For example, in a collect mode of operation, the first event that occurs while a timer is disarmed may arm the timer and reset the time value of the timer. When a timer count reaches the timer trip point, a status block may be generated and the timer may be disarmed. In a timeout mode of operation, the first event that occurs while a timer is disarmed may arm the timer and reset the time value of the timer. An event that may occur before the timer count reaches the timer trip point may reset the time value of the timer. When the timer count reaches the timer trip point, a status block may be generated and the timer may be disarmed.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.